Altium

Design Rule Verification Report

Date:		2023/10/31
Time:		16:27:01
Elapsed Time:		00:00:01
Filename:		C:\Users\devin\AppData\Local\TempReleases\Snapshot\1\SC_UniAdapter_Manual.PcbDoc

Warnings:		0
Rule Violations:		0

Summary

Warnings	Count
Total	0

Rule Violations	Count
Clearance Constraint (Gap=0.127mm) (All),(All)	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Un-Routed Net Constraint ( (All) )	0
Width Constraint (Min=0.254mm) (Max=1mm) (Preferred=0.5mm) (All)	0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)	0
Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)	0
Hole To Hole Clearance (Gap=0mm) (All),(All)	0
Minimum Solder Mask Sliver (Gap=0.01mm) (All),(All)	0
Silk to Silk (Clearance=0mm) (All),(All)	0
Net Antennae (Tolerance=0mm) (All)	0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)	0
Total	0